ESP32-C3 vs S3 vs C6: Which Chip Fits Your Device

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Pick the ESP32-S3 for a voice or AI device: two 240 MHz cores, vector instructions for AI and DSP, two I2S ports and in-package PSRAM options. Pick the C6 for Wi-Fi 6, Thread or Zigbee. Pick the C3 for a simple Wi-Fi and BLE node with a 5 µA Deep-sleep row, per Espressif datasheets.

Espressif sells all three chips with 2.4 GHz Wi-Fi and Bluetooth LE, so they can look interchangeable on a product slide. They differ in ways that change the product. The S3 is a dual-core chip built for heavier compute and media. The C3 is a small single-core part. The C6 adds Wi-Fi 6 and an 802.15.4 radio for Thread and Zigbee. This guide puts the published datasheet numbers side by side, then maps them to two common device types: a voice device and a battery sensor. Every figure comes from the current Espressif datasheets, read on November 5, 2026: ESP32-C3 version 2.4, ESP32-C6 version 1.5 and ESP32-S3 version 2.2. We ran no tests for this page.

ESP32-C3 vs S3 vs C6: what are the main differences?

The table lists the chip-level features as of November 2026. Module boards add their own flash, antenna and regulator, so read the module datasheet as well once you pick a module. When you move from a dev board to your own board, ESP32 dev board to custom PCB lists what changes.

Sources: ESP32-C3 datasheet v2.4, ESP32-C6 datasheet v1.5, ESP32-S3 datasheet v2.2, features lists and Table 1-1 in each, as of November 2026.

Three points stand out. First, the S3 has about 2.7 times the published CoreMark of the C6, from two cores and a higher clock. CoreMark is a general benchmark. It does not predict how fast a speech model or a filter runs, so treat it as a rough guide only. Second, only the S3 lists PSRAM in the package. Audio buffers and on-device models can need more memory than 400 to 512 KB of SRAM, and that alone can decide the choice. Third, none of the three lists 5 GHz Wi-Fi.

Part status matters as much as specs

Each datasheet marks some part numbers with a status. In the C3 table, the ESP32-C3FN4 is End of Life, the C3FH4AZ is Not Recommended for New Designs, and the C3FH4X is marked Recommended. In the S3 table, the S3R8V is End of Life, and the S3R2 is End of Life and upgraded to the S3RH2. These labels are as of November 2026 and can change with any revision. Write the exact part number and revision into your design file, and check the status again before you order parts for a pilot.

ESP32-C6 vs S3: which radio and protocol support do you need?

As of November 2026, the C6 is the only chip of the three with Wi-Fi 6 and 802.15.4. Its datasheet lists 802.11ax in a 20 MHz-only non-AP mode, with uplink and downlink OFDMA, downlink MU-MIMO and target wake time (TWT). The Wi-Fi Alliance says target wake time "significantly improves network efficiency and device battery life" (Wi-Fi Alliance, Wi-Fi CERTIFIED 6, as of November 2026). The battery gain depends on the access point supporting TWT, so test on the routers your customers use. It also lists IEEE 802.15.4-2015 at 250 Kbps, with Thread 1.3 and Zigbee 3.0. The datasheet says Wi-Fi, Bluetooth and 802.15.4 coexist and share the same antenna. One antenna for three radios saves board space. It also means the radios share air time, so test throughput and latency with all the radios your product uses running at once.

The S3 and C3 list 802.11b/g/n with 20 and 40 MHz channels and no 802.15.4. All three list Bluetooth LE with 125 Kbps, 500 Kbps, 1 Mbps and 2 Mbps speeds, mesh, and a high-power mode up to 20 dBm. The C6 datasheet says Bluetooth 5.3 certified. The C3 and S3 datasheets say Bluetooth 5.

When does Wi-Fi 6 help? The C6 datasheet lists target wake time as a feature that optimizes power saving. Any gain depends on the network the device joins. A product sold into homes will meet a mix of old and new routers, so plan your battery numbers on the older Wi-Fi modes the chip also supports, and treat TWT as a gain you confirm by measurement on your customers' access points. All three chips use 2.4 GHz Wi-Fi. For when a product needs 5 GHz instead, see 2.4 GHz vs 5 GHz Wi-Fi for IoT.

How much current does each chip draw in sleep and on the radio?

The figures below are typical values from Section 5.6 of each datasheet, as of November 2026. Espressif states the radio figures at a 3.3 V supply and 25 °C ambient. Transmit currents are rated at a 100% duty cycle, so they are peaks. Real transmit bursts are short, and your average depends on firmware.

Sources: C3 Tables 5-7 to 5-9, C6 Tables 5-7 to 5-11, S3 Tables 5-7 to 5-10, as of November 2026.

Some details hide in the footnotes. The S3 sleep and Modem-sleep rows apply to the S3 and S3FH8. Espressif says PSRAM parts may draw more. For Light-sleep, the S3 footnote says to add the PSRAM current: 140 µA for 8 MB Octal PSRAM at 3.3 V, 200 µA for 8 MB Octal PSRAM at 1.8 V and 40 µA for 2 MB Quad PSRAM at 3.3 V. On an 8 MB, 1.8 V part, that footnote nearly doubles the 240 µA Light-sleep row. The Deep-sleep rows also use different conditions on each chip. The 5 µA and 7 µA figures are close, and they describe different sets of blocks left powered. For measuring sleep current and radio bursts, see How to Measure Sleep Current on Microamp Devices.

The S3 Modem-sleep range is wide because its table covers 40 to 240 MHz, one or two cores, and 32-bit or 128-bit data access. At 240 MHz with both cores running 128-bit access, it lists 91.7 mA with peripheral clocks off and 107.9 mA with them on. A voice device that keeps both cores busy will sit near the top of that range while it processes audio.

Which chip fits a voice device or a sensor?

The table maps device types to a starting choice. It is engineering reasoning from the datasheet features above. Confirm it with a prototype before you lock the design.

For a BLE-only wearable, also compare a Nordic part. See nRF52840 vs ESP32.

Why the S3 suits voice

As of November 2026, the S3 datasheet describes its Processor Instruction Extensions as a set added to improve the efficiency of specific AI and DSP algorithms. The list includes 128-bit general-purpose registers, 128-bit vector operations such as complex multiplication, addition and shifting, combined load and store instructions, non-aligned vector data and saturation. Beamforming, noise suppression and small neural networks lean heavily on multiply and add math of this kind. These instructions run on the CPU cores. A neural processing unit is a separate hardware block, and what an NPU is in a small device covers the difference. The C3 and C6 feature lists show no FPU and no vector extensions.

Software support points the same way. Espressif's ESP-SR speech library page names the ESP32 and ESP32-S3 as its target chips, as of November 2026. Its overview lists an audio front end, the WakeNet wake-word engine and the MultiNet command recognizer, and the same documentation has sections on voice activity detection, noise suppression and echo cancellation. The two I2S interfaces on the S3 also give you separate paths for microphones and a speaker amplifier, which can simplify the audio design.

If your device needs to run a large speech model, a full operating system or camera vision at a high frame rate, even the S3 may be too small. Our guide on choosing an MCU or a Linux SoC for an AI wearable covers that line.

Why the C6 or C3 suits a sensor

A sensor spends most of its life asleep. The C3 publishes a 5 µA Deep-sleep row and the C6 a 7 µA row. The C6 also publishes a 35 µA Light-sleep row with peripherals powered down, the lowest Light-sleep figure of the three. Its datasheet groups an LP RISC-V core (up to 20 MHz) with an LP I2C and an LP UART in the low-power system. Whether your firmware can read a sensor on that path while the main core sleeps, and at what current, is a question for the technical reference manual and your bench. The C6 datasheet publishes no current row for the LP core at work.

On Bluetooth LE, the C6 lists 71 mA receive and 130 mA transmit at 0 dBm. The S3 lists 93 mA and 176 mA. For a device that wakes often to talk over BLE, that gap adds up. The C3 datasheet has no BLE current table, so plan to measure it yourself.

Temperature and enclosure checks

As of November 2026, the S3 Octal PSRAM parts (S3R8, S3R8V, S3R16V) list an ambient range of -40 to 65 °C. The datasheet says enabling PSRAM ECC raises the limit to 85 °C, at the cost of 1/16 of the usable PSRAM. The other S3 parts and all C3 and C6 parts in the tables list 85 °C or 105 °C. A sealed device that charges in a warm car, or a speaker with a hot amplifier, can push the air around the chip up. Check the expected internal temperature against the part you pick.

What should you ask your hardware team before choosing?

Use these questions in the design review. Each one points to a decision that is expensive to change after the first board.

• Which chip revision and exact part number are we designing in, and is it marked Recommended, Not Recommended for New Designs or End of Life in the current datasheet?
• Does the firmware need PSRAM? If so, only the S3 offers it in the package among these three. Which PSRAM size, and does its ambient temperature limit fit our enclosure?
• How much SRAM is left after the Wi-Fi and Bluetooth stacks, the audio buffers and the model, measured on a real build?
• Which wake-word or speech library will we use, and which chips does its vendor list as supported?
• Do we need Thread or Zigbee now or in a later model? If yes, only the C6 has the radio among these three.
• Which Wi-Fi access points will customers use, and have we tested connect and reconnect on Wi-Fi 4 and Wi-Fi 6 networks?
• What is the measured whole-device sleep current, including regulators, sensors, the microphone and any PSRAM?
• Will a module or a bare chip go on the board, and does that choice change the certification plan?
• Which secure boot and flash encryption settings will production units ship with, and who holds the keys?

All three chips list secure boot, flash encryption and hardware crypto acceleration in their datasheets, as of November 2026. The C6 also lists a trusted execution environment controller and access permission management. The settings you ship with, and who controls the keys, matter more than the feature list. The platforms we design with most often are listed on our engineering page. We assess others, such as the C6, at Gate 0.

If you are choosing a chip for a voice device or a battery sensor, tell us about your device. For voice hardware in general, see audio and voice hardware development.

Sources

All pages accessed November 5, 2026. Datasheets change with each revision, so re-read them before you rely on any figure.

• Espressif, ESP32-C3 Series Datasheet, version 2.4: https://documentation.espressif.com/esp32-c3_datasheet_en.pdf (accessed 2026-11-05)
• Espressif, ESP32-C6 Series Datasheet, version 1.5: https://documentation.espressif.com/esp32-c6_datasheet_en.pdf (accessed 2026-11-05)
• Espressif, ESP32-S3 Series Datasheet, version 2.2: https://documentation.espressif.com/esp32-s3_datasheet_en.pdf (accessed 2026-11-05)
• Espressif, ESP-SR Getting Started: https://docs.espressif.com/projects/esp-sr/en/latest/esp32s3/getting_started/readme.html (accessed 2026-11-05)