PDM uses two lines, clock and data, and one data line can carry two microphones. I2S uses three lines: SCK, WS and SD, with word select choosing left or right. The ESP32-S3 documentation shows how SoC peripherals limit the choice. This guide lists sourced facts, board measurements to record, and questions to ask before choosing.
The microphone interface decides which SoC peripheral you need and how many pins you route. This guide lists facts from the vendor and standards documents at the end, then what to measure on your own board and what to ask before choosing. It covers PDM and I2S/TDM only.
How do PDM and I2S compare on pins, mics and clock?
Each sourced cell links its document. The PDM figures come from one example part, the ST MP34DT01.
| Item | PDM (example part) | I2S / TDM |
|---|---|---|
| Signal lines | Two: clock and data. The mic receives the clock and drives the data. ST MP34DT01 datasheet, as of October 31, 2026 | Three: SCK, WS and SD. The device that generates SCK and WS is the controller. NXP I2S bus specification, as of October 31, 2026 |
| Mics per data line | Two. With L/R tied to GND, the mic drives data while the clock is low and is high-impedance while the clock is high. ST MP34DT01 datasheet, as of October 31, 2026 | Two time-multiplexed channels per standard I2S data line, chosen by word select. NXP I2S bus specification, as of October 31, 2026 |
| Slot or channel selection | The L/R pin on each mic. ST MP34DT01 datasheet, as of October 31, 2026 | WS = 0 is channel 1 (left). WS = 1 is channel 2 (right). NXP I2S bus specification, as of October 31, 2026 |
| Clock the mic needs | 1 to 3.25 MHz in normal mode for this example part. ST MP34DT01 datasheet, as of October 31, 2026 | Set by your design. See the bit-clock formula below. |
The same example part lists a typical supply current of 0.6 mA in normal mode and a power-down mode when the clock is below 0.23 MHz (ST datasheet, as of October 31, 2026).
How do you compute the I2S bit clock?
f_bclk = f_s × S × W
f_s sample rate, Hz
S slots on the bus
W slot width, bits
f_bclk bit clock, Hz| Variable | Meaning | Status | What to do |
|---|---|---|---|
| f_s | Sample rate, in Hz | Your assumption | Set by your voice pipeline. |
| S | Number of slots on the bus | Your assumption | Two channels on a standard I2S line. For TDM, use the slot count of your SoC peripheral. |
| W | Slot width, in bits | Your assumption | Set by the SoC peripheral configuration and the mic data format. |
| f_bclk | Bit clock, in Hz | Computed | f_bclk = f_s x S x W. |
What does one SoC support?
The ESP32-S3 documentation is a useful public example of how peripheral support limits the choice (Espressif ESP-IDF I2S documentation, as of October 31, 2026).
| ESP32-S3 feature | What the documentation says |
|---|---|
| Raw PDM receive | All I2S ports can transmit and receive raw PDM data. |
| Hardware PDM-to-PCM conversion | Supported on I2S0. |
| PDM data lines in RX mode | Up to 4, with each data line connectable to two PDM mics. |
| TDM | Up to 16 slots. |
What should you measure on your own board?
Clock noise coupling, noise floor and supply current in your own configuration are not in the documents above. Record the data below on your own board.
| What to measure | How to probe or capture | Raw data to record |
|---|---|---|
| Clock coupling into the audio path | Record a quiet-room capture with the mic clock running and the radio idle, then again with the radio active at its normal duty. Probe the clock line and the data line near the mic and near the SoC. | Raw captures for both cases, scope screenshots with probe points marked, firmware build ID, radio configuration, and the layout revision. |
| Noise floor of each interface | Build the same mic position on each candidate interface if you can. Record the same quiet scene and the same fixed speech clip played from a speaker at a fixed distance. | Raw audio files, the playback level and distance, the mic part number and datasheet revision, and the gain settings. |
| Supply current in your real configuration | Put a current meter on the mic supply rail and on the battery rail. Log idle, listening and recording states, and the power-down or low-clock state if your mic offers one. | Current traces with state labels, clock frequency in each state, firmware build ID, and meter model and settings. |
| Routing length and layout sensitivity | Measure the mic-to-SoC trace length on your board. Repeat the quiet-room capture with the flex or cable installed as in the final housing. | Layout files with trace lengths, photos of the assembly, and raw captures for each routing variant. |
| Mic count and slot assignment | Capture with every mic enabled. Tap or speak near one mic at a time and confirm which slot or data line carries it. | Mic-to-slot map, the register or driver configuration, and the captures used to confirm it. |
| Indicator and mic clock state | Log the indicator line and the mic clock line together through power-up, wake, sleep and fault states. | Indicator state against mic clock state in a logic capture, plus the firmware build ID. |
What should you ask before you choose?
Take this list to your team and to any supplier who proposes a microphone design.
- How many mics does the product need, and does the product need them on one bus?
- Which SoC or MCU are we using, and which of its peripherals can receive PDM, I2S or TDM, per its own reference manual?
- Does the SoC convert PDM to PCM in hardware, and on which ports?
- How long is the trace or flex between the mic and the SoC in the final housing?
- What sits next to the mic clock line on the board, and how close is the radio?
- Which sample rate does the voice pipeline need, and what bit clock follows from our slot count and width?
- Does the mic datasheet offer a low-power state, and how does our firmware enter and leave it?
- Where is the visible recording indicator wired, and does it follow the mic clock state in firmware?
- Which numbers in our plan come from a datasheet, and which are still guesses to be measured on our own board?
Questions about microphone interfaces
Can one data line carry two microphones?
Yes on both. For PDM, the example ST mic shares one output line between two mics through its L/R pin (ST datasheet, as of October 31, 2026). For I2S, word select picks the left or right channel on one data line (NXP I2S specification, as of October 31, 2026).
How do I compute the I2S bit clock?
Multiply sample rate by slots by slot width. Use your own three inputs.
Does this article compare analog mics?
No. It cites no analog datasheet, so it makes no analog claim. Take analog figures from the vendor of your chosen part.
If you want help choosing the interface and SoC for a voice or recording wearable, tell us about your device. You can also read about our audio and voice hardware development.
Sources
All pages accessed October 31, 2026. Documents and revisions change, so re-read them before you decide.
- NXP, I2S bus specification user manual UM11732: https://www.nxp.com/docs/en/user-manual/UM11732.pdf (accessed 2026-10-31)
- Espressif, ESP-IDF I2S API reference for ESP32-S3: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-reference/peripherals/i2s.html (accessed 2026-10-31)
- ST, MP34DT01 MEMS audio sensor datasheet (hosted copy): https://download.kamami.pl/p187700-mp34dt01.pdf (accessed 2026-10-31)
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